Engineering at the Limits of Speed and Scale: The State of Hardware Design

June 10, 2026

DesignCon is an annual event held in Silicon Valley that brings together the electrical engineering and semiconductor community, with engineers in attendance who specialize in signal integrity, packaging, interconnects, photonics, and testing and measurement. The 2026 event offered a snapshot of the challenges facing modern hardware design, particularly as AI and high-performance computing drive unprecedented demands for bandwidth, power efficiency, and system integration. Across technical sessions and the expo floor, discussions continued to return to one question: How can we move more data more quickly while maintaining reliability and performance?

AI Infrastructure and the Push Toward System-Level Design

One of the most consistent themes throughout the conference was the influence of AI workloads on hardware architecture. Sessions and exhibitor discussions highlighted ongoing work around 224 Gbps and 448 Gbps signaling, including the electrical and optical interconnect technologies needed to support next-generation AI and high-performance computing (HPC) systems.

As AI clusters expand, the amount of data moving between processors, memory, and networking hardware has increased dramatically. That shift is pushing designers to reconsider the limits of traditional electrical interconnects. Many talks explored the tradeoffs between copper and optical solutions, while others focused on improving power delivery networks and managing signal integrity at extremely high frequencies.

At the same time, many presentations pointed to a broader trend within electronic design automation (EDA). Several of the major EDA vendors are moving rapidly toward system-level integration and automation through AI-driven design workflows. Tools from companies such as Cadence and Keysight increasingly incorporate AI agents to automate setup, optimization, and verification tasks.

At left: DesignCon’s venue, the Santa Clara Convention Center. At right: COMSOL Application Engineer Andy Cai and Sales Development Representative Charles Milhans with DesignCon’s mascot, Chiphead.

The Role of High-Fidelity Physics Simulation

While EDA vendors focused heavily on automation and workflow integration, another theme emerged around the role of physics-based simulation: When engineers discuss 3D simulation at DesignCon, they often treat it as the gold standard for validating advanced designs.

Many signal integrity (SI) and power integrity (PI) workflows rely on layout-based extraction, transmission-line models, and 2D or 2.5D field-solving approaches that are highly effective for system-level analysis. However, emerging packaging and interconnect challenges can involve geometric and material details that require full 3D multiphysics modeling, when contact, thermal coupling, or packaging complexity break the assumptions of simplified approaches.

For many engineers in the SI/PI community, detailed 3D simulation is not part of their daily workflow. As a result, there is a growing demand for high-accuracy physics results that can validate designs developed in system-level tools. Finite-element-method (FEM)-based multiphysics modeling software such as COMSOL Multiphysics® can complement SI, PI, and EDA workflows by resolving detailed 3D effects, coupling electromagnetics with thermal and structural phenomena, and providing high-fidelity reference results for design validation.

AI Agents and the Future of Engineering Workflows

One of the more notable developments at the conference was the growing use of AI agents within engineering software. A keynote presentation on agentic AI for chip design, delivered by Mark Ren of Agentrys, explored how AI systems may eventually assist engineers in navigating complex design spaces, generating candidate solutions, and automating parts of the validation process.

In these emerging workflows, high-fidelity simulation plays an important role as a source of reliable data. Detailed physics models can serve as the reference point for training machine-learning-based surrogate models. In that sense, simulation results may become the benchmark used to validate AI-generated designs.

This relationship between simulation and AI reflects a broader shift in engineering practice. Rather than replacing traditional modeling approaches, AI tools appear to be augmenting them. Automated design exploration, surrogate models, and optimization algorithms can help accelerate development, but these technologies still depend on accurate physical models for verification.

Mark Ren, founder of Agentrys, stands on a dark stage giving a presentation about agentic AI for chip design. Agentrys founder Mark Ren gave a keynote talk about how AI is beginning to automate and improve hardware design workflows.

Converging Approaches in Hardware Design

DesignCon 2026 offered a snapshot of how these trends are beginning to converge. The event remains deeply rooted in signal integrity and power integrity, but the challenges facing these disciplines are increasingly interdisciplinary. Electrical design, materials science, thermal analysis, and system architecture are now tightly connected.

For engineers working in these fields, conferences like DesignCon provide an opportunity to see how different pieces of the hardware ecosystem are evolving together. Judging by the conversations this year, the integration of AI-driven design workflows with high-fidelity physics simulation will likely play an important role in shaping the next generation of electronic systems.

Learn More

For more information about how COMSOL Multiphysics® supports this ecosystem, check out this upcoming webinar about AI-assisted simulation workflows.

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